Design of High-Speed Wide-Word Hybrid Parallel-Prefix/Carry-Select and Skip Adders
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所属单位：电子信息工程学院
发表刊物：JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY
关键字：Parallel-prefix Carry-select adder Delay analysis High-speed adder
摘要：In this paper, hybrid parallel-prefix/carry select and skip adder (PPF/CSSA) schemes are proposed for high-speed wide-size adders. The proposed adders are based on an improved design of the parallel-prefix network and carry select (CSL) blocks. In this design, the delays of the two parts are balanced and matched. The proposed method cuts the carry chain in the CSL block and separates the block into two subblocks, in which the carry-in signals of the second sub-blocks are connected directly with the PPF signals to reduce the critical path. The proposed adders are evaluated at 45 nm technology and compared with previous designs. The proposed designs reduce the delay and power-delay product (PDP) by up to 29% and 33%, respectively, compared to previous designs.
ISSN号：1939-8018
是否译文：否
发表时间：2018-03-01
合写作者：刘伟强,Wang, Shumin,Swartzlander, Earl E., Jr.,Lombardi, Fabrizio
通讯作者：崔晓平,刘伟强