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同专业硕导
吴比
( 副研究员 )
赞
的个人主页 http://faculty.nuaa.edu.cn/wubi/zh_CN/index.htm
副研究员 硕士生导师
招生学科专业:
电子信息 -- 【招收硕士研究生】 -- 集成电路学院
集成电路科学与工程 -- 【招收硕士研究生】 -- 集成电路学院
性别:
男
毕业院校:
北京航空航天大学
学历:
博士研究生毕业
学位:
工学博士学位
所在单位:
电子信息工程学院
办公地点:
将军路校区工程训练中心8312
电子邮箱:
312c97670fdf7f18ad6f804a17b859f044bb5d6020d4f3adb78142f512cc269d1a06a437fae6e172e441386a80700899cf622098c70065fb664e0024e27590e1bd3772742ef6bb8a28e5d7c6eb1efdbb23056fcc7a2be132dc0d6256e7b92e2bfae49702d804afbe613e5f2fb19b06895c3bc69355baaa6bad2973cd0074ba38
论文成果
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[16] 刘桐汐,王昭昊,王梦醒,王朝,吴比,刘伟强,赵巍胜.Multiple modes of perpendicular magnetization switching scheme in single spin–orbit torque devic....[J]:Chinese Physics B
[17] 祝浩男,吴比,陈珂,闫成刚,刘伟强.High-performance in-memory logic scheme using unipolar switching sot-mram.[C]:2022 IEEE 22nd International Conference on Nanotechnology (NANO),2022:112-115
[18] 吴比,.GBC: An Energy-Efficient LSTM Accelerator With Gating Units Level Balanced Compression Strategy.[J]:IEEE Transactions on Circuits and Systems I: Regular Papers,2022,69(9):3655 - 3665
[19] .A Survey of MRAM-Centric Computing: From Near Memory to In Memory.[J]:IEEE Transactions on Emerging Topics in Computing,2022
[20] 吴比,.An Energy Efficient Accelerator for Bidirectional Recurrent Neural Networks (BiRNNs) Using Hybrid...:IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS,2021
[21] .Field-Free 3T2SOT MRAM for Non-Volatile Cache Memories.[J]:IEEE Transactions on Circuits and Systems I: Regular Papers,2020,67(12):4660 - 4669
[22] .Bulkyflip: A NAND-SPIN-Based Last-Level Cache With Bandwidth-Oriented Write Management Policy.[J]:IEEE Transactions on Circuits and Systems I: Regular Papers,2019,67(1):108 - 120
[23] .A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Co....[J]:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,2020,39(4):803 - 815
[24] .A NAND-SPIN-Based Magnetic ADC.[J]:IEEE Transactions on Circuits and Systems II: Express Briefs,2020,68(2):617 - 621
[25] .An Adaptive Thermal-Aware ECC Scheme for Reliable STT-MRAM LLC Design.[J]:IEEE Transactions on Very Large Scale Integration (VLSI) Systems,2019,27(8):1851 - 1860
[26] .Temperature Impact Analysis and Access Reliability Enhancement for 1T1MTJ STT-RAM.[J]:IEEE Transactions on Reliability,2016,65(4):1755 - 1768
[27] .A comparative cross-layer study on racetrack memories: Domain wall vs skyrmion:ACM Journal on Emerging Technologies in Computing Systems (JETC),2019,16(1):1-17
[28] .Write-Efficient STT/SOT Hybrid Triple-Level Cell for High-Density MRAM.[J]:IEEE Transactions on Electron Devices,2020,67(4):1460 - 1465
[29] .An Adaptive 3T-3MTJ Memory Cell Design for STT-MRAM-Based LLCs.[J]:IEEE Transactions on Very Large Scale Integration (VLSI) Systems,2018,26(3):484 - 495
[30] .Multiple modes of perpendicular magnetization switching scheme in single spin–orbit torque devic....[J]:Chinese Physics B,2022,31(10):107501
共44条 2/3
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