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所属单位：信息化处（信息化技术中心）

发表刊物：JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY

关键字：Approximate/inexact computing Floating-point Multiplier Low power

摘要：Approximate/inexact computing has become an attractive approach for designing high performance and low power arithmetic circuits. Floating-point (FLP) arithmetic is required in many applications, such as digital signal processing, image processing and machine learning. Approximate FLP multipliers with variable accuracy are proposed in this paper; the accuracy and the circuit requirements of these designs are analyzed and assessed according to different metrics. It is shown that the proposed approximate FLP multiplier designs further reduce delay, area, power consumption and power-delay product (PDP) while incurring about half of the normalized mean error distance (NMED) compared with the previous designs. The proposed IFLPM24-15 is the most efficient design when considering both PDP and NMED. Case studies with three error-tolerant applications show the validity of the proposed approximate designs.

论文类型：期刊论文

学科门类：工学

一级学科：电子科学与技术

文献类型：J

ISSN号：1939-8018

是否译文：否

发表时间：2018-04-01

合写作者：王成华,刘伟强,Swartzlander, Earl E., Jr.,Lombardi, Fabrizio

通讯作者：尹培培,刘伟强