异构多核体系结构

多核系统互连网络

神经网络加速器

AI辅助计算机系统设计

代表性期刊/会议论文 (Google Scholar):

[MICRO'24] Lingxiang Yin, Sanjay Gandham, Mingjie Lin and Hao Zheng. SCALE: A Structure‑Centric Accelerator for Message Passing Graph Neural Networks. In Proceedings of IEEE/ACM International Symposium on Microarchitecture (MICRO), IEEE, 2024. (CCF‑A)

[DAC'24] Fangzhou Ye*, Lingxiang Yin*, Amir Ghazizadeh Ahsaei and Hao Zheng. EGMA: Enhancing Data Reuse and WorkloadBalancinginMessagePassingGNNAccelerationviaGramMatrixOptimization. InProceedingsofthe61stAnnual Design Automation Conference (DAC), IEEE, 2024. (CCF‑A)

[ICCAD'24] Sanjay Gandham, Joe Walston, Sourav Samanta, Lingxiang Yin, Hao Zheng, Mingjie Lin and Stelios Diamantidis. CircuitSeer: RTL Post‑PnR Delay Prediction via Coupling Functional and Structural Representation. In Proceedings of IEEE International Conference on Computer‑Aided Design (ICCAD), IEEE, 2024. (CCF‑B)

[ICCAD'23] Lingxiang Yin, Amir Ghazizadeh, Ahmed Louri, and Hao Zheng. ARIES: Accelerating Distributed Training in Chiplet‑based Systems via Flexible Interconnects. In Proceedings of IEEE International Conference on ComputerAided Design (ICCAD), IEEE, 2023. (CCF‑B)

[ICCAD'23] Sanjay Gandham*, Lingxiang Yin*, Mingjie Lin, and Hao Zheng. SAGA: Sparsity‑Agnostic Graph Convolutional Network Acceleration with Near‑optimal Workload Balance. In Proceedings of IEEE International Conference on Computer‑Aided Design (ICCAD), IEEE, 2023. (CCF‑B)

[ICCD'23] Lingxiang Yin, Amir Ghazizadeh, Shilin Tian, Ahmed Louri and Hao Zheng. Polyform: A Versatile Architecture for Multi‑DNN Execution via Spatial and Temporal Acceleration. In Proceedings of IEEE International Conference on Computer Design (ICCD), IEEE, 2023. (CCF‑B)

[GLSVLSI'23] Lingxiang Yin, Jun Wang, and Hao Zheng. Exploring Architecture, Dataflow, and Sparsity for GCN Accelerators: A Holistic Framework. In Proceedings of ACM Great Lakes Symposium on VLSI (GLSVLSI), 2023. (CCF‑C)