Daiyin Zhu
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Video SAR High-speed Processing Technology Based on FPGA
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Affiliation of Author(s):电子信息工程学院

Journal:IEEE MTT-S Int. Microw. Biomed. Conf., IMBioC - Proc.

Abstract:Designing and implementing a Video SAR (Video Synthetic Aperture Radar, SAR) high-speed processing system through a Field Programmable Gate Array (FPGA), which can achieve an imaging processing speed of 5 frames per second. This paper proposes a high-speed processing scheme based on PFA imaging algorithm, which lays a foundation for the real-time performance of video SAR imaging processing. The system realizes radar imaging multi-pulse parallel range processing and high-precision SINC interpolation parallel azimuth processing. The design is verified by the Xilinx Virtex7-XC7VX690T-2FFG1761 development board. The test results show that the system can achieve 2048∗2048 points single-precision complex image imaging processing in 0.18 seconds at a frequency of 200MHz. The real data processing results verify the reliability and effectiveness of the system. © 2019 IEEE.

Translation or Not:no

Date of Publication:2019-05-01

Co-author:Wang, Die,Liu, Rui

Correspondence Author:Daiyin Zhu

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Professor

Alma Mater:南京航空航天大学

Education Level:南京航空航天大学

Degree:Doctoral Degree in Engineering

School/Department:College of Electronic and Information Engineering

Discipline:Communications and Information Systems. Communications and Information Systems. Signal and Information Processing

Business Address:电子信息工程学院318办公室

Contact Information:zhudy@nuaa.edu.cn, 025-84892410(Tel), 2843602904(qq)

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