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Affiliation of Author(s):电子信息工程学院

Title of Paper:A new compact hardware architecture of S-Box for block ciphers AES and SM4

Journal:IEICE ELECTRONICS EXPRESS

Key Words:advanced encryption standard (AES) SM4 S-Box composite field arithmetic (CFA)

Abstract:In this paper, a new compact implementation of S-Box based on composite field arithmetic (CFA) is proposed for block ciphers AES and SM4. Firstly, using CFA technology, the multiplicative inverse (MI) over GF(2(8)) is mapped into GF((2(4))(2)) and the new architecture of S-Box is designed. Secondly, the MI over GF(2(4)) is optimized by Genetic algorithm (GA), and the multiplication over GF(2(4)) and the constant matrix multiplications are optimized by delay-aware common sub-expression elimination (DACSE) algorithm. Finally, compared with the direct implementation, the area reduction of MI over GF((2(4))(2)) and the new S-Box are up to 49.29% and 43.80%, severally. In 180nm 1.8V COMS technology, compared to the synthesized results of AES S-Box and SM4 S-Box, the area and power consumption of the new S-Box are reduced by 24.76% and 38.54%, respectively.

ISSN No.:1349-2543

Translation or Not:no

Date of Publication:2017-06-10

Co-author:Liu, Yaoping,Zhang, Xiaoqiang,zf

Correspondence Author:吴宁