罗运虎   

Associate Professor
Supervisor of Master's Candidates

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Language:English

Paper Publications

Title of Paper:基于FPGA+SCV64架构的VME总线从模块开发

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Affiliation of Author(s):自动化学院

Journal:测控技术

Key Words:VME总线;FPGA;SCV64;数据通信;

Abstract:为满足新机VME总线模块电路板深修的需要,基于VME总线接口协议芯片SCV64,开发了具有接收VME总线信号读写操作功能的从模块。该从模块可实现对机上VME总线模块通信能力检测。给出其硬件架构与各部分电路设计,基于Verilog语言对其读写功能进行软件开发,并给出其硬件设计与软件开发过程中需要注意的问题。对从模块功能进行测试,测试结果表明其功能有效。研制的VME总线从模块能够为后续VME总线模块的测试与维修提供技术支撑。

Translation or Not:no

Date of Publication:2019-02-18

Co-author:白煊,郑永龙,周勇军

Correspondence Author:lyh

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