Affiliation of Author(s):电子信息工程学院
Journal:JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY
Key Words:Parallel-prefix Carry-select adder Delay analysis High-speed adder
Abstract:In this paper, hybrid parallel-prefix/carry select and skip adder (PPF/CSSA) schemes are proposed for high-speed wide-size adders. The proposed adders are based on an improved design of the parallel-prefix network and carry select (CSL) blocks. In this design, the delays of the two parts are balanced and matched. The proposed method cuts the carry chain in the CSL block and separates the block into two subblocks, in which the carry-in signals of the second sub-blocks are connected directly with the PPF signals to reduce the critical path. The proposed adders are evaluated at 45 nm technology and compared with previous designs. The proposed designs reduce the delay and power-delay product (PDP) by up to 29% and 33%, respectively, compared to previous designs.
ISSN No.:1939-8018
Translation or Not:no
Date of Publication:2018-03-01
Co-author:Weiqiang Liu,Wang, Shumin,Swartzlander, Earl E., Jr.,Lombardi, Fabrizio
Correspondence Author:cxp,Weiqiang Liu
Date of Publication:2018-03-01